BRST=0, JEND=0, JRST=0, JSRT=0
JPEG Code Command Register
| JSRT | JPEG Core Process Start CommandTo start JPEG core processing, set this bit to 1. Do not write this bit to 1 again while this module is in operation. 0 (0): No effect. 1 (1): Start JPEG core processing |
| JRST | JPEG Core Process Stop Clear CommandTo clear the process-stopped state caused by requests to read the image size and pixel format (enabled by the INT3 bit in JINTE0), set this bit to 1. 0 (0): No effect. 1 (1): Clear the process-stopped state caused by requests to read the image size and pixel format(enabled by the INT3 bit in JINTE0). |
| JEND | Interrupt Request Clear Command This bit is valid only for the interrupt sources corresponding to bits INS6, INS5, and INS3 in JINTS0. To clear an interrupt request, set this bit to 1 0 (0): No effect. 1 (1): Clear all bits in JINTE0. |
| BRST | Bus Reset. NOTE: When this module is in operation, the bus reset command should not be issued. 0 (0): No effect. 1 (1): Resets the JCDTCU, JCDTCM, JCDTCD, JCDERR and JCRST registers. |